Method for characterizing interconnect timing characteristics us

Details Method for characterizing interconnect timing characteristics us Method for characterizing interconnect timing characteristics us

1996-09-17

1998-08-04

Miska, Vit M.

Horology: time measuring systems or devices

Time interval

Electrical or electromechanical

324 731, 324658, 324681, 324686, 327 46, G04F 800, G01R 1512

Patent

active

057904790

ABSTRACT:
A reference ring oscillator circuit (RROC) is used to determine timing characteristics of a test interconnect structure in an integrated circuit. The RROC includes an odd number of inverters coupled together in a ring manner and has defined test segments at which a test interconnect can be loaded. Reference timing characteristics of the unloaded RROC are determined according to a calibration method including the steps of: (a) directly measuring signal propagation delay through each segment of the RROC; (b) modeling each test segment using an RC tree type reference circuit model having reference elements; (c) simulating the reference circuit model to provide a functional relationship between two reference capacitors; (d) defining upper and lower bounds for propagation delay through the test segment in terms of the reference elements; (e) determining values for the reference capacitor elements; and (f) measuring a reference frequency of oscillation of the unloaded RROC.

REFERENCES:
patent: Re34363 (1993-08-01), Freeman
patent: 4795964 (1989-01-01), Shetti
patent: 5294559 (1994-03-01), Dethimy
patent: 5625288 (1997-04-01), Snider et al.
"Signal Delay in RC Tree Networks," IEEE Transactions on Computer-Aided Design, vol. CAD-2, No. 3, Jul. 1983, pp. 202-211.

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