Method for burn-in operation on a wafer of memory devices

Details Method for burn-in operation on a wafer of memory devices Method for burn-in operation on a wafer of memory devices

1998-02-27

1999-08-31

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Testing

365 63, 365 96, G11C 1300

Patent

active

059462485

ABSTRACT:
A method is provided for use on a wafer formed with a plurality of dice on each of which a memory device, such as a DRAM (dynamic random access memory) device to perform a burn-in operation on the memory device so as to test the reliability thereof. By this method, a plurality of pads are formed in the scribe lines that are used as reference marks in the cutting apart of the dice. These pads are used to transfer an externally generated burn-in enable signal and a DC bias voltage to each memory device. Since the pads for burn-in wiring are formed in the scribe lines, they will not take additional space on the dice where each memory device is formed. The burn-in operation is more convenient, quick, and cost-effective to implement.

REFERENCES:
patent: 5373478 (1994-12-01), Komatsu

Affiliated with

Also associated with

Rating

Method for burn-in operation on a wafer of memory devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for burn-in operation on a wafer of memory devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for burn-in operation on a wafer of memory devices will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2427952