Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent
1997-10-08
1999-11-02
Hua, Ly V.
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
714 54, 714 40, G06F 1100
Patent
active
059789352
ABSTRACT:
A dual-port RAM-type ring-address FIFO including a data input register with a set of transparent latches is tested by causing the FIFO to execute a test method comprised of a set of interwoven steps. Upon execution, the steps of the method cause the FIFO to manifest all possible memory, address and functional faults. This test method manifests faults by causing the FIFO to alter the state of various flags it normally sets and by altering the logic state of the data normally produced by the FIFO.
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Fenstermaker Larry Ray
Kim Ilyoung
Zorian Yervant
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