Method for blocking bus transactions during reset

Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration

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Details

713400, 710108, G06F 15177, G06F 112, G06F 1300

Patent

active

06134656&

ABSTRACT:
The present invention comprises a method for blocking transactions on a host bus until a target agent is out of reset, comprising synchronizing a reset signal received by the host bus such that the reset signal is clocked in the clock domain of the target agent, determining whether the reset signal clocked in the target agent clock domain is deasserted and blocking transactions on the host bus until it is determined that the reset signal clocked in the target agent clock domain has been deasserted.

REFERENCES:
patent: 5377325 (1994-12-01), Chan
patent: 5524237 (1996-06-01), Bestler
patent: 5758170 (1998-05-01), Woodward et al.
patent: 5832241 (1998-11-01), Guy

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