Method for autonomous dynamic voltage and frequency scaling...

Electrical computers and digital processing systems: support – Computer power control – Power conservation

Reexamination Certificate

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C713S600000, C718S102000, C714S001000

Reexamination Certificate

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07840825

ABSTRACT:
A method for autonomous dynamic voltage (v) and frequency (f) scaling (DVFS) of a microprocessor, wherein autonomous detection of phases of high microprocessor workload and prediction of their duration is performed (PID). The microprocessor frequency (f) will be temporarily increased (LUT) to an appropriate safe value (even beyond its nominal frequency) consistent with technological and ambient constraints in order to improve performance when the computer system comprising the microprocessor benefits most, while during phases of low microprocessor workload its frequency (f) and voltage (v) will be decreased to save energy. This technique exploits hidden performance capabilities and improves the total performance of a computer system without compromising operational stability. No additional hardware such as service processors is needed for contemporary computer systems supporting performance counters and DFVS already. The invention allows significantly increasing the total computer system performance with only minimal impact on power (PMAX, PACTUAL) consumption.

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China Patent Office—Office Action dated Sep. 25, 2009 in Chinese.
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C. Isci et al, Long Term Workload Phases: Duration Predictions and Applications to DVFS, IEEE Micro vol. 25, 2005, pp. 39-51.
W.L. Bircher et al, Runtime Identification of Microprocessor Energy Saving Opportunities, ISLPED'05, Aug. 8-10, 2005, San Diego, CA, 6 pages.
X. Wang et al., Managing Peak Sysem-Level Power with Feedback Control, RC23835 (W0512-086) Dec. 19, 2005, pp. 1-12.

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