Method for automatically isolating hardware module faults

Details Method for automatically isolating hardware module faults Method for automatically isolating hardware module faults

1999-04-22

2002-04-09

Le, Dieu-Minh (Department: 2184)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S715000

Reexamination Certificate

active

06370659

ABSTRACT:

FIELD OF THE INVENTION
This invention is related to a method for automatically isolating item faults in a system, and more particularly, this invention is related to a method for automatically isolating item faults by using matrices to identify which have failed.
BACKGROUND OF THE INVENTION
Fault isolation techniques and related methods of automatically detecting faults (such as for line replaceable units or least replaceable units (LRU)) are becoming increasingly important to maintain complicated apparatus and communications equipment in proper operating order. One of the drawbacks of conventional fault isolation techniques is the use of software that is specific to a general system, such as a communication system. For example, in the prior art fault isolation technique labeled
FIG. 1
, four line replaceable units are illustrated at
200
a-d
as part of the equipment forming a general communication system indicated by the dotted line at
22
. The line replaceable units
200
a-d
output to respective line replaceable units as illustrated. The prior art communications equipment includes a sensor
24
that would sense respective a line replaceable unit
20
d
and means to conduct a subtest and generate performance data to an automatic fault isolation software or hardware module
26
, which would not be part of the communication equipment. A software module would include the appropriate processor having specific software with numerous software branches that depend on hardware and system specific algorithms.
The sensor
24
typically checks the status of equipment and outputs performance data. Often, a line replaceable unit
20
may generate its own status bit, such as an “on” or “off” bit, which indicates a problem has occurred in a line replaceable unit. Any automatic fault isolation software typically is a complicated software code with many branches. It is costly to develop, test and maintain. Additionally, this complicated software is difficult to reuse because the specific case branches depend on the specific hardware, which naturally is different in each system. In the prior art process, the automatic fault isolation software or hardware module
26
identifies the failed line replaceable unit, and then outputs a status report to an operator.
FIG. 2
illustrates a basic problem showing why automatic fault isolation techniques are difficult. Individual line replaceable units are shown as hardware modules, and given reference numerals
30
A-
30
H. For example, both hardware modules
30
A and
30
B are required to provide necessary signal inputs to the other modules
30
C,
30
D and
30
E, which in turn are directly responsible for providing input signals to respective hardware modules
30
F,
30
G and
30
H. Thus, a failure of either module
30
A or module
30
B can cause the observed test failures.
FIG. 3
shows a diagram similar to
FIG. 2
, but having module
30
E input signals to modules
30
H and
30
I. It is evident that one hardware module failure can make several subtests fail, and different hardware module failures can cause similar patterns of subtest failures.
Many prior art devices and software systems have been developed to aid in diagnostic testing of different hardware, using status checks and software testing. Examples include the following systems and apparatus disclosed in the following U.S. Patents.
U.S. Pat. No. 5,652,754 to Pizzica discloses a signature analysis usage limited to 100% digital systems for fault isolation. It derives a digital signature by a sequence of binary operations on the digital outputs of the module, in response to a sequence of digital inputs to the module. It does not consider any other electrical or physical variables. It is disclosed for single electrical node short or open failures, and other node failure types without substantiation, but does not disclose multiple node failures or failures internal to components. This system typically cannot be applied during normal system operation, and relies on an external test input signal source for a predetermined sequence of input stages. It requires disconnection of module inputs from their operational configuration, and connection instead to the external test input signal source. It looks for exact matches to predetermined signatures derived from digital module outputs, rather than partial matches to lists of symptoms caused by component failures. It makes no attempt to find an explanation for the greatest number of observed symptoms.
U.S. Pat. No. 3,813,647 to Loo discloses a system that does a window comparison on a sequence of analog or pulse rate test points, with branches in the sequence depending on any values out of tolerance. It looks first at high level summary indications, and then in more detail at a subset of equipment where a high level fault was found. It also includes signal generators to provide synchronized stimuli to the system under test during the sequence. It seems to flag only a single fault, the first that it arrives at in the preprogrammed sequence. This method requires stimulating the system under test with predetermined inputs from signal generators or equivalent.
U.S. Pat. No. 3,787,670 to Nelson discloses a system that considers various physical variables such as punched card movement, voltage, temperature, pressure, etc. to be converted to digital signals using an A/D converter. A major feature is the use of photo cells for sensing punched cards. Performance of various subunits would be measured and monitored relative to correct performance. The system compares quantized digital values to reference values, but without specifying high and low limits, and a central processor is used for the comparisons and decisions. The system identifies the location in the equipment where the bad data value occurred.
U.S. Pat. No. 4,142,243 to Bishop et al. discloses a system for fault detection using checksums on a digital computer. The system checks for faults first in large sets, then checks in subsets contained in the large set where a fault occurred. The system assumes a simple one to one correspondence of checksum memory locations and hardware fault locations, and a computer under test to follow a predetermined sequence of digital states so that measured and pre-stored checksums match. The technique does not apply during normal online operation.
U.S. Pat. No. 5,157,668 to Buenzli, Jr. et al. discloses a fault isolation system that uses reasoning techniques, minimal test patterns, component modeling, and search strategies. Modeling uses “behavioral constraints” which include “phase constraints,” gain constraints, compliances, tolerances, and saturation. “Phase constraints” equals IF inputs change, and outputs change in the plus/minus direction. The system uses recursive top-down hierarchical search strategy starting with highest level modules, and isolates low-level circuit components. The system also uses a library of circuit component models, and starts with normal functional tests, requiring detailed functional test plan. It also assumes that an operator already knows which module is tested by each functional test. The system also assumes electric schematic, CAD models, CAE models, and layout diagrams are available, and typically it would be difficult to apply during normal system operation. The system relies on an external test input signal source for a predetermined sequence of input states, and disconnects module inputs from their operational configuration, and connects instead to the external test input signal source.
U.S. Pat. No. 5,581,694 to Iverson discloses a fault isolation system that receives data samples, indicating the operating status of units in a system, and analyzes this data to identify unit failures, using a knowledge base (in a data structure) about the equipment. The knowledge base describes signal flow through the system, and the technique considers failure propagation along this signal flow.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a method for automatically isolating item faults that can use st

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