Image analysis – Applications – Manufacturing or product inspection
Reexamination Certificate
1999-08-17
2003-02-18
Mehta, Bhavesh (Department: 2625)
Image analysis
Applications
Manufacturing or product inspection
C382S151000, C382S216000, C250S311000, C356S508000
Reexamination Certificate
active
06522776
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to semiconductor processing and, more particularly, to a method, system, and storage medium for determination of reticle tilt in a lithographic system.
2. Description of the Relevant Art
Fabrication of integrated circuits upon semiconductor substrates (“wafers”) involves numerous processing steps. For example, the fabrication of a metal-oxide-semiconductor (“MOS”) integrated circuit includes the formation of trench isolation structures within a semiconductor substrate to separate each MOS field-effect transistor (“MOSFET”) that will be made. The semiconductor substrate is typically doped with either n-type or p-type impurities. A gate dielectric, typically composed of silicon dioxide, is formed on the semiconductor substrate. For each MOSFET being made, a gate conductor is formed over the gate dielectric and a source and drain are formed by introducing dopant impurities into the semiconductor substrate. Conductive interconnect lines are then formed to connect the MOSFETs to each other and to the terminals of the completed integrated circuit. Modem high-density integrated circuits typically include multiple interconnect levels to provide all of the necessary connections. Multiple interconnect levels are stacked on top of each other with intervening dielectric levels providing electrical insulation between interconnect levels.
During integrated circuit fabrication, various structures, including the trench isolation structure, gate conductor, and interconnect lines, of the circuit are patterned, typically using optical lithography. Lithography is process whereby a pattern is transferred from a mask onto the semiconductor substrate. Lithography begins by applying a photosensitive material, often called photoresist, as a thin film to an upper surface of the wafer. Light is then projected onto the photoresist through the mask, which contains clear and opaque features that define a pattern to be created in the photoresist. The portions of the photoresist exposed to the light are rendered either soluble or insoluble in a specific solvent, often called developer. After the developer removes soluble portions of the photoresist, the remaining photoresist forms a mask that may be used in patterning layers of the wafer underneath the photoresist. For example, the photoresist may be used to protect the covered portions of the semiconductor substrate while the exposed portions of the semiconductor substrate are etched.
One commonly used lithographic system is the step and repeat projection system in which the mask, referred to as a reticle, can pattern only a portion of the photoresist. The step and repeat system projects a pattern of the reticle onto a portion of the semiconductor substrate. The system then moves the semiconductor substrate and projects the pattern of the reticle onto a different portion of the semiconductor substrate. This process is repeated until the reticle's pattern has been projected onto the entirety of the semiconductor substrate. Since multiple, identical integrated circuits are manufactured on the large diameter (typical diameter—200 mm) semiconductor substrates used in modern integrated circuit fabrication, the reticle will pattern a portion of the photoresist corresponding to one or more circuits. For example, the reticle may pattern four seperate die simultaneously. Step and repeat projection system also often have lenses placed between the reticle and the semiconductor substrate such that the pattern projected onto the photoresist is smaller than the pattern of the reticle. Pattern reduction of a factor of five is common.
A prevalent trend in modern integrated circuit fabrication is reducing the size of circuit structures, such as gate conductors and interconnect lines, to permit circuits of greater complexity to be manufactured without substantially increasing the area occupied by the circuit. This continuing reduction in size places ever greater demands on the lithography system to increase its resolution. Rayleighs criterion defines the minimum distance between two features in the pattern that are resolvable: Two separate features are resolvable if 2d=0.61 &lgr;/NA where 2d is the distance between the features, &lgr; is the wavelength of the of light projected by the lithographic system, and NA is the numerical aperture of the lens that focuses light from the reticle onto the photoresist. Resolution is typically increased (i.e., reducing 2d) by either decreasing the wavelength of light used or by increasing the numerical aperture of the lens.
Depth of focus is another critical property of the lithographic system. Depth of focus refers to the ability to focus light over only a limited focal plane. Depth of focus &sgr; is given by &sgr;=&lgr;/(NA)
2
where &lgr; is the wavelength of the of light and NA is the numerical aperture of the lens as before. Improvements in the resolution of the lithographic system by decreasing the wavelength or increasing the numerical aperture unfortunately results in a decrease of the depth of focus. Modern step and repeat projection system, which typically use light with wavelengths of 365 nm (I-line) or 248 nm (deep UV) and have numerical apertures greater than 0.6, often have a depth of focus of less than 1 &mgr;m.
If any portion of the photoresist is outside of the focal plane of the lithographic system, that portion of the photoresist will be improperly exposed resulting in incomplete transfer of the reticle pattern onto the photoresist. The developed photoresist will therefore not have the desired pattern and the photoresist may not protect the proper portions of the underlying semiconductor substrate when the photoresist is used as a mask. For example, if the photoresist is being used to mask a metal layer that is being etched to form interconnects, a defective mask may result in two interconnects being shorted or may result in an interconnect having a width less than that targeted and therefore a current carrying capacity less than that targeted. Both situations may lead to failure of the integrated circuit being manufactured. In general, underexposure of the photoresist will decrease the yield of the fabricated integrated circuits and increase the costs of manufacturing. The yield is defined as the percentage of completed integrated circuits manufactured that are functional.
The limited depth of focus of modem lithographic systems requires extremely tight tolerances on the positioning of all components in the system including the reticle and semiconductor substrate. For example, both the upper surface of the semiconductor substrate and the photoresist layer must be planar. Also, both the reticle and semiconductor must be positioned the correct distances from one another. Additionally, if the reticle is tilted, portions of the photoresist may be outside of the focal plane and those portions may therefore be underexposed. Having one side of the reticle out of position by as little as 0.3 &mgr;m may result in an unacceptable amount of reticle tilt. In general, modem lithographic systems have the ability to precisely adjust the position and tilt of the reticle.
To aid in verifying proper performance of the lithographic system, test patterns are typically included on reticles in addition to patterns corresponding to the circuit being manufactured. The test patterns are arranged on the reticle such that the test patterns formed in the photoresist are in areas of the semiconductor substrate external to areas of the semiconductor substrate in which circuits are being fabricated. Examination of the test patterns on the semiconductor substrate after development of the photoresist can yield information about the performance of the lithographic system.
An unacceptable amount of reticle tilt is generally checked for by examining multiple test patterns on the semiconductor substrate. Due to their small size, test patterns are typically imaged using a scanning electron microscope. If every test pattern has the correct shape, the reticle is
Advanced Micro Devices , Inc.
Chawan Sheela
Conley & Rose & Tayon P.C.
Daffer Kevin L.
Mehta Bhavesh
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