Method for analysis of interconnect coupling in VLSI circuits

Details Method for analysis of interconnect coupling in VLSI circuits Method for analysis of interconnect coupling in VLSI circuits

2005-09-27

2005-09-27

Whitmore, Stacy A. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C703S013000

Reexamination Certificate

active

06951001

ABSTRACT:
A method for analyzing coupling between interconnects in a VLSI processor to simulate the impact of process variations by the use of model-fitted equations to determine a delay change curve for a coupled interconnect. Simulated curves are first used to determine the parameters in the model-fitted equations. These model-fitted equations are then used to derive the output waveform at the output of a victim line using superposition of noise waveforms calculated for a plurality of aggressors. The output waveform is then quadratically expanded to obtain the delay change curve, and the statistical mean and the standard deviation of the victim delay through the coupled interconnect are calculated by using said quadratic function and the statistical behavior of all inputs to the coupled interconnect.

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