Method for an improved air gap interconnect structure

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of...

Reexamination Certificate

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C257S762000

Reexamination Certificate

active

07629268

ABSTRACT:
In one embodiment, an apparatus comprises a first layer having at least one interconnect formed in an interlayer dielectric (ILD), a second layer formed over the first layer having a second at least one interconnect, a third layer formed over the second layer, the third layer defining at least one air gap between the second at least one interconnect and the third layer, and at least one shunt selectively covering the first and second at least one interconnects. In another embodiment, a method comprises forming a first layer comprising an ILD and a first at least one interconnect, forming a second layer over the first layer, the second layer having a second at least one interconnect, depositing at least one shunt over the first and second at least one interconnects, forming a third layer over the second layer, and evaporating a portion of the second layer to create at least one air gap between the second at least one interconnect and the third layer.

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Gossett, et al., “General review of issues and perspectives for advanced copper interconnections using air gap as ultra-low K material”, 3 pages, Jun. 2003,Phillips Semiconductors Crolles R&D, 860 rue Jean Monnet 38920 Crolles France.
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Noguchi, et al., “Simple Self-Aligned Air-Gap Interconnect Process with Cu/FSG Structure”, 3 pages, Jun. 2003, Device Development Center, Hitachi, Ltd., Ome, Tokyo, 198-8512, Japan.

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