Electrical computers and digital data processing systems: input/ – Input/output data processing – Flow controlling
Reexamination Certificate
2000-01-18
2004-01-06
Elamin, Abdelmoniem (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Flow controlling
C712S209000, C712S210000, 36
Reexamination Certificate
active
06675235
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an execution unit in a data processing system, and specifically to an execution unit used in a direct memory access controller.
BACKGROUND OF THE INVENTION
As data processing systems are required to process increasing amounts of information and perform a variety of operations on data, coprocessors are often added to perform specific functions. In video and audio applications the data is compressed and/or decompressed to improve the throughput of the transmission system. These systems require arithmetic and logical operation capability as well as more complex operations to accommodate compression, etc. Typically, these functions are performed using software or some dedicated hardware.
Many of the more complicated operations result in data rate distortion. For example, when input data is compressed, the amount of output data that will result from a given input data stream is often not determinable. Data rate distortion adds to the flexibility of the data processing system and is a requirement of most systems that process video, audio and communication information.
Software routines provide a flexible, convenient method of processing information, but also introduce latency into the systems, as typically many cycles are required to perform each of the various algorithms. Hardware solutions are less flexible, but provide a faster computation. Hardware and coprocessors typically have an input/output (I/O) bus for communication with the main processor, such as a central processing unit (CPU), and the rest of the data processing system. The I/O bus prevents the coprocessor from simultaneously receiving data while outputting data to the data processing system. This prevents these coprocessors from pipelining instructions where instructions are received while others are processed.
Therefore, there is a need within a data processing system for an interface protocol that allows for complex processing of information involving data rate distortion, for applications such as compression and decompression, and that allows continuous pipelined flow of data through an execution unit to improve processing speed.
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Motorola M68020 Microprocessors User's Manual, Section 7, “Coprocessor Interface Description”, pp. 7-1-7-60.
Galloway Frank C.
Mason Kristen L.
McKeown Jennifer L.
Morrison Gary R.
Nuckolls Charles Edward
Clingan, Jr. James L.
Elamin Abdelmoniem
Motorola Inc.
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