Method for aligning stored data

Details Method for aligning stored data Method for aligning stored data

2005-12-27

2005-12-27

Bragdon, Reginald G. (Department: 2188)

Electrical computers and digital processing systems: memory

Address formation

Slip control, misaligning, boundary alignment

C711S118000

Reexamination Certificate

active

06981121

ABSTRACT:
An arithmetic unit performs an arithmetic operation, and outputs data obtained as a result of the arithmetic operation. The data output from the arithmetic unit is stored in a store buffer. The data read from the store buffer is stored in cache memory. A first alignment circuit allows an alignment circuit to realign the data output from the arithmetic unit and stored in the store buffer, and the second alignment circuit realigns data read from the store buffer and stored in the cache memory.

REFERENCES:
patent: 5907865 (1999-05-01), Moyer
patent: 2004/0003174 (2004-01-01), Yamazaki
patent: A-10-312281 (1998-11-01), None
patent: A-2000-82009 (2000-03-01), None

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