Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Counting – scheduling – or event timing
Reexamination Certificate
2005-05-24
2005-05-24
Cao, Chun (Department: 2115)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Counting, scheduling, or event timing
C713S400000, C713S500000
Reexamination Certificate
active
06898725
ABSTRACT:
Disclosed is a method and a computer circuit design for a dynamic clock ratio detector. The detector is used to determine the ratio between two clock domains. The detector has a driver101and a receiver, which reside in different clock domains. The driver101constantly produces a ratio clock pulse to the receiver. The ratio-counter in the receiver counts the pulse width based on its local clock cycles. The clock ratio detector has many features, including absorbing the meta-stability effect when the pulse crosses an asynchronous interface. The clock ratio detector prevents output counts oscillation, provides an adjustable ratio-detecting coverage range, a programmable system-parameter generator104,and a programmable error reporter105.
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Kark Kevin W.
Wang Liyong
Augspurger Lynn L.
Cao Chun
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