Semiconductor device manufacturing: process – With measuring or testing – Electrical characteristic sensed
Patent
1997-05-06
1999-07-13
Picardat, Kevin M.
Semiconductor device manufacturing: process
With measuring or testing
Electrical characteristic sensed
438 14, 438 16, 438 18, G01R 3126, H01L 2166
Patent
active
059239476
ABSTRACT:
An automated method for selectively locating fill pattern diffusion regions on a semiconductor substrate. In one embodiment, the present invention determines the locations of active diffusion regions on a semiconductor substrate. The present invention also determines the locations of interconnect lines on the semiconductor substrate. Next, the present invention creates a union of the location of the active diffusion regions on the semiconductor substrate and the location of the interconnect lines on the semiconductor substrate. The present invention uses this union to define allowable locations for placement of fill pattern diffusion regions on the semiconductor substrate such that the fill pattern diffusion regions are not disposed under the interconnect lines.
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patent: 5462882 (1995-10-01), Chisholm et al.
patent: 5627083 (1997-05-01), Tounai
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Collins Deven
Picardat Kevin M.
VLSI Technology Inc.
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