Method for accommodating small minimum die in wire bonded...

Details Method for accommodating small minimum die in wire bonded... Method for accommodating small minimum die in wire bonded...

2005-05-10

2005-05-10

Potter, Roy (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Configuration or pattern of bonds

C257S737000

Reexamination Certificate

active

06891275

ABSTRACT:
An area array package comprising a die attach area for attaching a die to a substrate, a network of staggered bond fingers, and a network of bond islands for coupling bond wires between the bond islands and die bond pads is provided. A network of package leads, for example, a network of solder balls in a ball grid array, is depopulated to permit greater trace route flexibility and via placement within the substrate. Stacked die and multi-chip packages are also disclosed. A method for accommodating a high pin-count die in an area array package is also included.

REFERENCES:
patent: 5545923 (1996-08-01), Barber
patent: 5691568 (1997-11-01), Chou et al.
patent: 5898213 (1999-04-01), Torres et al.
patent: 6407456 (2002-06-01), Ball

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