Method for a thin film multilayer capacitor

Metal working – Electric condenser making – Solid dielectric type

Reexamination Certificate

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C438S396000

Reexamination Certificate

active

06216324

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to multilayer electronic components and, in particular, to thin film multilayer capacitors and a method for making the same.
2. Description of Related Art
Multilayer substrates with capacitors have found widespread use in electronics as integrated circuit packages. Multilayer capacitors consist of a plurality of interleaved and staggered layers of an electrically conductive film of metal and electrically insulating layers of a ceramic oxide (dielectric). Such capacitors are well known in the art. For example, U.S. Pat. No. 2,389,420 issued to A. J. Deyrup on Nov. 20, 1945, entitled, “MANUFACTURE OF CAPACITORS”, describes the structure, manufacture, and properties of monolithic multilayer ceramic capacitors.
Typically, multilayer ceramic capacitors are manufactured by building up an interleaved configuration of metal electrodes and ceramic layers, dicing individual parts out of the build-up, then subjecting the parts to a slow burnout and then higher temperature firing.
A capacitor structure can alternatively be formed by using thin films of electrodes and dielectrics which are deposited on a prefabricated multilayer substrate. Typically, the bottom electrode is deposited using such techniques as sputter deposition, evaporation, chemical vapor deposition, or sol-gel.
The dielectric is deposited using a plasma or chemical vapor deposition method (PVD or CVD), or other method such as a spin-on technique. An example of films applied wet is a sol-gel film or other organic medium film which is heat treated leaving the inorganic dielectric component. The dielectric film may require one or more heat treatments in a specific ambient such as an oxidizing atmosphere to arrive at the desired stoichiometries. An example of a dielectric film is barium titanate (BT), barium strontium titanate (BST), or barium zirconate titanate (BZT). These films can be deposited using a sputter deposition technique which employs an appropriate target in the presence of argon plasma, metallorganic chemical vapor deposition (MOCVD), or sol-gel processing.
The dielectric film may then be patterned using a resist stencil and dry or wet etching methods. The final step is to put down a top electrode, which is typically selected from a similar list of materials used for the bottom electrode.
It is desirable to have the thin film capacitor reside on a ceramic substrate so that the metalized vias can be made to cleanly pass through the layered capacitor.
An interposer thin film capacitor fabricated on a multilayer ceramic substrate base has through vias, typically for ground, power, and signal connections. The interposer capacitor is located between the integrated circuit (IC) chip and the substrate, typically providing decoupling capacitance for the IC lines.
In building a thin film capacitor structure on a ceramic interposer, the ceramic surface defects such as voids, pits, and undulations often create fatal shorts in the overlying thin film regions. Typically, the shorts arise because the films are extremely thin, on the order of 1000 A for an adhesion or barrier layer, 1000 A for a Pt electrode, 1000 A-2500 A for a high k dielectric, and 1000 A for a top Pt electrode. Further, conventional void filling approaches such as polymer fill cannot be used because the subsequent high temperature anneal required for dielectric film optimization is sufficient to severely degrade and possibly destroy the polymer used to fill the voids.
Thick film structures do not share this deficiency. Using standard thick film print and fire assembly techniques, a metal paste (typically gold) 8-12 &mgr;m thick covers the substrate top surface to form a first trace for a metal electrode. This thick metal trace fills unwanted voids. In U.S. Pat. No. 5,640,699 issued to Ralph on Jun. 17, 1997, entitled, “MIXER CONSTRUCTED FROM THICK FILM BALANCED LINE STRUCTURE”, a thick first metal layer deposited on the substrate base begins the fabrication of a standard circuit cell. However, thin film constructions, especially dielectric materials with edge coupled lines requiring tight tolerances and exacting construction, do not lend themselves to automated manufacturing techniques or surface mount assembly techniques commonly used for thick film structures.
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide a multilayer electronic component containing thereon a thin film capacitor.
It is another object of the present invention to provide a method for forming a thin film multilayer interposer capacitor removed of shorts caused by substrate defects.
Still other objects of the invention will in part be obvious and will in part be apparent from the specification.
SUMMARY OF THE INVENTION
The above and other objects and advantages, which will be apparent to one of skill in the art, are achieved in the present invention which is directed to, in a first aspect, an electronic component structure comprising: an electronic component with conductive leads; a multilayer substrate with a top surface, the substrate comprising a plurality of layers having therein metalized circuitry, and interconnecting metalized vias; a thin film structure with a top surface, a bottom surface opposite the top surface, and interconnecting metalized vias, such that the vias at the bottom surface are electrically connected to the interconnecting metalized vias of the multilayer substrate, and the vias at the top surface are electrically connected to the electronic component conductive leads, the thin film structure containing at least one capacitor comprising: at least one patterned, lower first structure layer on the top surface of the thin film structure comprising of a first conductive material, such that the conductive material is deposited at a thickness greater than 0.5 &mgr;m; a dielectric layer; and an upper, second structure layer over the dielectric comprising of a second conductive material.
The electronic component structure may also have a patterned, lower first structure that is a metal layer of a thickness greater than or equal to 2 &mgr;m. Additionally, the patterned, lower first structure may comprise: a layer of Cr; a layer of Cu; a diffusion barrier layer; a layer of Pt; and an optional layer of Ti for adhesion enhancement.
The thin film dielectric layer is comprised of a high dielectric constant material which may comprise: barium strontium titanate; barium titanate; barium zirconate titanate; lead lanthanum zirconate; lead zirconate titanate; or, tantalum oxide.
The present invention is directed to, in a second aspect, an electronic component structure comprising: an electronic component with conductive leads; a multilayer substrate with a top surface, the substrate comprising a plurality of layers having therein metallized circuitry, and interconnecting metalized vias; a thin film structure with a top surface, a bottom surface opposite the top surface, and interconnecting metalized vias, such that the vias at the bottom surface are electrically connected to the interconnecting metalized vias of the multilayer substrate, and the vias at the top surface are electrically connected to the electronic component conductive leads, the thin film structure containing at least one capacitor comprising: at least one patterned, lower first structure layer on the top surface of the thin film structure comprising of a first conductive material, such that the first conductive material is deposited at a thickness greater than 0.5 &mgr;m; at least one patterned, upper second structure layer comprising of a second conductive material, the second structure layer thinner than the first structure layer; a thin film dielectric between the first and second structure layers; a cured, first polyimide layer on portions of the top surface of the thin film structure, between openings of the patterned first structure layer, over a portion of the dielectric, and underneath portions of the patterned second structure layer; a cured, seco

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