Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2008-07-15
2008-07-15
McLean-Mayo, Kimberly (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S118000, C711S152000, C711S170000, C711S173000
Reexamination Certificate
active
07401188
ABSTRACT:
A method, device, and system are disclosed. In one embodiment, the method comprises setting a threshold length for data allowed in a cache, inserting data into the cache during a read or a write request if the length of the data requested is less than the threshold length, and not inserting data into the cache during a read or write request if the length of the data requested is greater than or equal to the threshold length.
REFERENCES:
patent: 5644751 (1997-07-01), Burnett
patent: 5689679 (1997-11-01), Jouppi
patent: 7047362 (2006-05-01), Kim et al.
patent: 2003/0182390 (2003-09-01), Alam
Intel Corporation
Intel Corporation
McLean-Mayo Kimberly
Reynolds Derek J.
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