Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2007-01-02
2009-08-25
Nguyen, VanThu (Department: 2824)
Static information storage and retrieval
Read/write circuit
Signals
C365S189160, C365S193000, C365S233130, C365S233160
Reexamination Certificate
active
07580301
ABSTRACT:
A memory control circuit includes: a phase detection module for detecting a phase difference between a data strobe signal and a clock signal; a control module, coupled to the phase detection module, for generating a set of control signals according to the phase difference, where the set of control signals correspond to the phase difference; a latch module for latching write data carried by a data signal according to rising/falling edges of the data strobe signal; an odd/even data separator, coupled to the latch module, for performing odd/even data separation on the write data to generate a data separation signal carrying odd/even data corresponding to the write data; and an adjustable delay line module, coupled to the odd/even data separator and the control module, for adjusting the odd/even data's delay according to the control signals, where the delay amount of the odd/even data corresponds to the control signals.
REFERENCES:
patent: 6707723 (2004-03-01), Jeong
patent: 7042799 (2006-05-01), Cho
patent: 7123524 (2006-10-01), Han
patent: 7209396 (2007-04-01), Schnell
patent: 7457190 (2008-11-01), Lee, Geun II
Hsu Winston
Nanya Technology Corp.
Nguyen Van-Thu
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