Electrical computers and digital data processing systems: input/ – Access locking
Reexamination Certificate
2005-07-19
2005-07-19
Dang, Khanh (Department: 2111)
Electrical computers and digital data processing systems: input/
Access locking
C713S002000
Reexamination Certificate
active
06920514
ABSTRACT:
A data processing system includes a global promotion facility and a plurality of processing units coupled by an interconnect. At least one processing unit among the plurality of processing units includes one or more second caches having cache arrays in which instructions and operand data are cached, an instruction sequencing unit, an execution unit that executes an acquisition instruction to acquire a promotion bit field within the global promotion facility exclusive of at least one other processing unit, and a promotion cache separate from the one or more second caches. In response to acquisition of the promotion bit field by the first processor, the promotion cache of the first processor stores the promotion bit field separately from instructions and operand data.
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Implementing Spinlocks on the Intel Itanium Architecture and PA-RISC, Hewlett Packard Company, 2003.
Arimilli Ravi Kumar
Williams Derek Edward
Dang Khanh
Dillon & Yudell LLP
International Business Machines - Corporation
Salys Casimer K.
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