Method, apparatus, and system for high speed data transfer...

Details Method, apparatus, and system for high speed data transfer... Method, apparatus, and system for high speed data transfer...

2006-03-14

2006-03-14

Lee, Thomas (Department: 2115)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

Correction for skew, phase, or rate

C713S401000

Reexamination Certificate

active

07013407

ABSTRACT:
According to one aspect of the invention, a method is provided in which a plurality of data signals are transmitted in parallel mode via a parallel bus from a first device to a second device. Phase information of each data signal received at the second device is detected against a corresponding clock signal. The phase information is sent from the second device to the first device. At the first device, an output delay of each data signal is adjusted based on the phase information received from the second device.

REFERENCES:
patent: 5872959 (1999-02-01), Nguyen et al.
patent: 6725390 (2004-04-01), Liu et al.

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