Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing
Reexamination Certificate
2005-11-30
2010-11-30
Patel, Niketa I (Department: 2181)
Electrical computers and digital data processing systems: input/
Input/output data processing
Direct memory accessing
C710S023000, C710S024000, C709S212000
Reexamination Certificate
active
07844752
ABSTRACT:
A method, apparatus and program storage device for enabling multiple asynchronous direct memory access task executions. DMA I/O operations and performance are improved by reducing the overhead in DMA chaining events by creating a software DMA queue when a hardware DMA queue overflows and dynamically linking new DMA requests to the software queue until a hardware queue becomes available at which time the software queue is put on the hardware queue. Thus, microcode does not need to manage the hardware queues and keep the DMA engine running continuously because it no longer has to wait for microcode to reset the DMA chain completion indicator.
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Atsushi Hatabu, et al.; QVGA/CIF Resolution MPEG-4 Video Codec Based on a Low-Power and General-Purpose DSP; Journal; Jul. 14, 2005; Springer Science Business; Netherlands.
Mirabeau Lucien
Pham Tiep Quoc
Griffiths & Seaton PLLC
International Business Machines - Corporation
Patel Niketa I
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