Method, apparatus and computer program product for...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000, C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07131084

ABSTRACT:
A method, apparatus and computer program product are provided for implementing automated detection of excess aggressor shape capacitance coupling in printed circuit board layouts. A PCB design file containing an electronic representation of a printed circuit board design is received. A list of candidate shapes is identified. The candidate shapes are disposed on layers adjacent to aggressor planes. A capacitance coupling the candidate shapes to adjacent aggressor planes is calculated. A ratio of the calculated capacitance and a decoupling capacitance connecting the candidate shapes to a reference plane is determined. The PCB design file containing an electronic representation of a printed circuit board design includes shape data and text data that are extracted to produce a list of shapes' names, areas, locations and planes; and includes data defining thickness and relative permittivity of the dielectric layers used for calculating the effective capacitance is an inter-layer parallel-plate effective capacitance.

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