Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-05-29
2007-05-29
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
10708056
ABSTRACT:
A method to verify a circuit design may include applying a bounded model checking technique to a first computer language representation of the circuit design and to a second computer language representation of the circuit design. The method may also include determining a behavioral consistency between the first and second computer language representations.
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Clarke Edmund M.
Kroening Daniel
Yorav Karen
Carnegie Mellon University
Moore Charles L.
Moore & Van Allen PLLC
Siek Vuthe
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