Electrical computers and digital processing systems: interprogra – Interprogram communication using shared memory
Reexamination Certificate
2005-07-12
2005-07-12
Follansbee, John (Department: 2154)
Electrical computers and digital processing systems: interprogra
Interprogram communication using shared memory
Reexamination Certificate
active
06918119
ABSTRACT:
The present invention relates to a method and system for determining the status of each entry in an instruction window buffer in multi-processor, parallel processing environments. A combinatorial circuit, which automatically generates active instruction window status information, is added to the buffer itself. This status information is used by a plurality of processes like renaming registers and issuing and committing instructions as an output associated with a respective buffer entry.
REFERENCES:
patent: 5584037 (1996-12-01), Papworth et al.
patent: 5584038 (1996-12-01), Papworth et al.
patent: 5627984 (1997-05-01), Gupta et al.
patent: 5740393 (1998-04-01), Vidwans et al.
patent: 5812812 (1998-09-01), Afsar et al.
patent: 5923900 (1999-07-01), Soell et al.
patent: 5930491 (1999-07-01), Hilgendorf et al.
patent: 6138231 (2000-10-01), Deosaran et al.
patent: 6349380 (2002-02-01), Shahidzadeh et al.
patent: 6438651 (2002-08-01), Slane
patent: 6505293 (2003-01-01), Jourdan et al.
patent: 6594754 (2003-07-01), Jourdan et al.
patent: 6625723 (2003-09-01), Jourday et al.
Farrell, et al., “Issue Logic for a 600-MHz Out-of-Order Execution Microprocessor,” IEEE Journal of Solid-State Circuits, vol. 33, No. 5, May 1998, pp. 707-712.
Palacharla et al., “Complexity-Effective Superscalar Processors,” ISCA ' 97 Denver, CO, USA, 1997 ACM 0-89791-901-7/97/0006, pp. 206-218.
Gaddis, et al., “A 56-Entry Instruction Reorder Buffer,” ISSCC96/Session 13/Microprocessors/Paper FP 13.2, 1996 IEEE International Solid-State Circuits Conference, pp. 212-213, 447.
Haller Wilhelm E.
Leenstra Jens
Sautter Rolf
Wendel Dieter
Wernicke Friedrich-Christian
Augspurger, Esq. Lynn L.
Follansbee John
Heslin Rothenberg Farley & & Mesiti P.C.
International Business Machines - Corporation
Patel Haresh
LandOfFree
Method and system to improve usage of an instruction window... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and system to improve usage of an instruction window..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system to improve usage of an instruction window... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3371029