Static information storage and retrieval – Read/write circuit – Parallel read/write
Patent
1997-08-12
1999-06-29
Mai, Son
Static information storage and retrieval
Read/write circuit
Parallel read/write
36518904, 36523005, G11C 700
Patent
active
059177691
ABSTRACT:
A method and system of utilizing a memory array device contained within an integrated circuit within the printer device is provided in which data bits are written in a row format, thereby filling an N.times.M memory array device and then read in a column format. An N.times.M memory array device is employed such as a 32.times.32 bit memory array. During the reading phase, data from a computer is read by the memory device in a parallel fashion so that data is written sequentially a row of memory cells, such as B0W0, B1W0, B2W0 . . . etc. Once the memory array is loaded up, the writing phase is accomplished by performing a parallel dump wherein all of the memory cells of the first column are read together such that a column of memory cells, such as B0W0 to B0W31 is read first, a column of memory cells, such as B1W0 to B1W31 is read second, a column of memory cells B2W0 to B2W31 is read third etc. The N.times.M memory array device is read in a column format instead of the standard row format. As is evident, one or more arrays may be utilized.
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Lucent Technologies - Inc.
Mai Son
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