Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2006-02-03
2009-06-16
Beausoliel, Robert (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S011000, C710S262000
Reexamination Certificate
active
07549082
ABSTRACT:
A method and system of bringing processors to the same computational point. At least some of the illustrative embodiments are computer systems comprising a first processor executing a program, a second processor executing a duplicate copy of the program (but at different computational points in the program), and a shared main memory coupled to the first and second processors. When the processors each receive duplicate copies of an interrupt request, the processors are configured to bring their respective programs to the same computational points prior to servicing the interrupt request.
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Bruckert William F.
Damian Mihai
Klecka James S.
Reynolds Peter A.
Southgate Dale E.
Beausoliel Robert
Guyton Philip
Hewlett--Packard Development Company, L.P.
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