Method and system in a superscalar data processing system for th

Details Method and system in a superscalar data processing system for th Method and system in a superscalar data processing system for th

1996-12-16

1998-07-21

Treat, William M.

39580023, G06F 946

Patent

active

057846065

ABSTRACT:
A method and system in a data processing system are disclosed for efficiently handling exceptions. The data processing system includes a register for storing indications of multiple instructions while the multiple instructions are being concurrently processed. An exception is generated within the data processing system. A determination is made whether the exception was generated by one of the multiple instructions. In response to a determination that one of the multiple instructions generated the exception, a determination is then made whether an indication of the instruction which generated the exception is stored in a particular position within a register within the data processing system. In response to a determination that the indication of the instruction is stored in the particular position within the register, the exception is associated with a first priority group. In response to a determination that the indication of the instruction is not stored in the particular position within the register, the exception is associated with a second priority group. In response to a determination that the indication of the instruction did not generate the exception, the exception is associated with the second priority group.

REFERENCES:
patent: 5448705 (1995-09-01), Nguyen et al.
patent: 5659721 (1997-08-01), Shen et al.
Walker et al., "Interrupt Processing in Concurrent Processors", Computer, IEEE, Jun. 1995, pp. 36-46.
Smith et al., "Implementing Precise Interrupts in Pipelined Processors", Transactions on Computers., IEEE, vol. 37, No. 5, May 1988, pp. 562-573.

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