Method and system for writing data to memory cells

Static information storage and retrieval – Systems using particular element – Semiconductive

Reexamination Certificate

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C365S175000, C365S189011

Reexamination Certificate

active

07054191

ABSTRACT:
A first and a second set of memory cells are connected to the same first word line and second word line. At the commencement of data writing, the first word line is set up. The first set of memory cells is read and temporarily stored into a buffer. At about the same time, the bit lines of the second set of memory cells is set up. After completion of reading of the first set of memory cells, the bit lines of this set of memory cells are set up (while the setting up of the bit lines of the second set of memory cells continues). After the bit lines of both sets of memory cells are set up, the second word line is pulsed. At this time, written into both sets of memory cells begins, which comprises data previously read from the first set of memory cells and new data to be written into the second set of memory cells. It is found that this method reduces the overall write time.

REFERENCES:
patent: 5883829 (1999-03-01), van der Wagt
patent: 6229161 (2001-05-01), Nemati et al.
patent: 6735113 (2004-05-01), Yoon et al.

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