Method and system for wafer backside alignment

Details Method and system for wafer backside alignment Method and system for wafer backside alignment

2006-04-24

2009-11-03

Lindsay, Jr., Walter L (Department: 2812)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Having substrate registration feature

C438S689000

Reexamination Certificate

active

07611960

ABSTRACT:
Disclosed is a method and a system for wafer backside alignment. A zero mark patterning on front side of a substrate. A plurality of layers are deposited on the front side of the substrate. The wafer is flipped over with backside of the substrate facing up, and a through wafer etching is performed from the backside to an etch stop layer deposited over the front side of the substrate.

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Taiwan Office Action issued Mar. 13, 1998, Application No. 095132490.

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