Method and system for variable thread allocation and...

Electrical computers and digital processing systems: virtual mac – Task management or control – Process scheduling

Reexamination Certificate

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Details

C718S100000, C718S102000, C718S108000, C712S034000, C712S035000

Reexamination Certificate

active

07917907

ABSTRACT:
Techniques for processing transmissions in a communications (e.g., CDMA) system. An aspect of the disclosed subject matter includes a method for processing instructions on a multithreaded processor. The multithreaded processor processes a plurality of threads via a plurality of processor pipelines. The method includes the step determining the operating frequency, F, at which the multithreaded processor operates. Then, the method determines a variable thread switch timeout state for triggering the switching of the processing among the plurality of active threads. The variable thread switch timeout state varies so that each of the plurality of active threads operates at a frequency of an allocated portion of the frequency, F. The allocated portion at which the active threads operate is determined at least in part in order to optimize the operation of the multithreaded processor. The method further switches the processing from a first one of the active threads to a next one of the active threads upon the occurrence of the variable thread switch timeout state.

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Theo Ungerer, Borut Robic, Jurij Silc, “A Survey of Processors with Explicit Multithreading”, ACM Computing Survey vol. 35, Mar. 2003, pp. 29-63.
Ungerer, Theo, “A Survey of Processors with Explicit Multithreading” ACM Computing Surveys, vol. 35, No. 1, Mar. 2003 (29-63).

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