Method and system for the temporary designation and utilization

Details Method and system for the temporary designation and utilization Method and system for the temporary designation and utilization

1997-10-08

1999-12-28

Donaghue, Larry D.

Electrical computers and digital processing systems: processing

Architecture based instruction processing

Stack based computer

712 23, 712200, 712215, 712216, 712217, 712222, G06F 700

Patent

active

060095091

ABSTRACT:
A method and system in a superscalar data processing system are disclosed for the temporary designation and utilization of a plurality of physical registers as a stack. For each of the multiple instructions to be processed during a single clock cycle by the data processing system, a determination is made whether each of the instructions is a particular type of instruction. If a determination is made that an instruction is a particular type of instruction, a quantity of physical registers to be temporarily designated as a stack is determined utilizing the instruction. A second plurality of physical registers available to be utilized as a stack are determined whether the second plurality of the quantity. The second plurality of physical registers are then temporarily designated and utilized as a stack.

REFERENCES:
patent: 5499352 (1996-03-01), Clift et al.
patent: 5519841 (1996-05-01), Sager et al.
patent: 5675759 (1997-10-01), Shebanow et al.
patent: 5852726 (1998-12-01), Lin et al.

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