Electrical computers and digital processing systems: processing – Instruction alignment
Patent
1998-02-06
1999-12-28
Eng, David Y.
Electrical computers and digital processing systems: processing
Instruction alignment
G06F 924
Patent
active
060095105
ABSTRACT:
An apparatus and method for loading aligned/misaligned data from a cache within a microprocessor is provided. The apparatus contains a first ALU for generating a partial offset, alignment check logic for quickly estimating the alignment of the data, a second ALU for generating a linear address, and alignment confirmation logic for confirming the alignment of the data. Quick estimation of data alignment allows the load of data to proceed before full alignment calculations are completed. A mandatory slip during data alignment checking is eliminated.
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patent: 5823259 (1998-11-01), Stiles
Henry G. Glenn
Parks Terry
Eng David Y.
Huffman James W.
Huffman Richard K.
IP - First LLC
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