Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2005-01-11
2005-01-11
Baderman, Scott (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C703S024000
Reexamination Certificate
active
06842865
ABSTRACT:
A test system and method for testing a processor circuit board having at least one processor. The system includes a processor control circuit connected to the processor circuit board which enables test routines to be run on the processor of the processor circuit board, a peripheral emulator circuit, having a connector for connecting to at least one peripheral connector on the processor circuit board, for emulating at least one function of at least one peripheral device, a response circuit measuring the response of the processor circuit board to a test routine, a main controller in electronic communication with the processor control circuit and the response circuit. In operation, the processor control circuit receives instructions from the main controller and causes the processor on the processor circuit board to run a test routine. The response circuit will then communicate the results of the test routine to the main controller.
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Fenton William
Harvey Ciaran
Nee Patrick
Simmonds Malcolm
Baderman Scott
Formia Limited
Nydegger & Associates
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