Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2006-08-22
2006-08-22
Baderman, Scott (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S031000, C714S033000
Reexamination Certificate
active
07096385
ABSTRACT:
A method and system for testing a microprocessor. The method includes executing debug application software on an external device, downloading diagnostic program instructions from the external device to a cache memory within the microprocessor via a serial test interface. Once the diagnostic program instructions are loaded into the cache memory, the method includes executing the diagnostic program instructions from within the cache memory.
REFERENCES:
patent: 6016554 (2000-01-01), Skrovan et al.
patent: 6055656 (2000-04-01), Wilson et al.
patent: 6687857 (2004-02-01), Iwata et al.
patent: 6832345 (2004-12-01), Corteville et al.
patent: 6910155 (2005-06-01), Ku
patent: 2002/0184562 (2002-12-01), Nadeau-Dostie et al.
Ayers Kevin E.
Fant Richard G.
Hokanson Paul B.
Advanced Micro Devices , Inc.
Baderman Scott
Bonura Timothy M.
Curran Stephen J.
Kivlin B. Noäl
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