Method and system for synchronizing block-organized data...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area

Reexamination Certificate

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C709S241000, C710S241000

Reexamination Certificate

active

06493805

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to a synchronizing method. U.S. Pat. No. 4,594,657 describes a semaphore organization between first and second stations through a first binary semaphore that indicates ownership or non-ownership, and a second binary ownership semaphore that indicates which of the two stations previously owned the semaphore. First gating circuitry decodes control signals from the first station and generates a read or write signal. The read signal from the first gating circuit loads the semaphore and ownership signals into first and second flipflops respectively, whose outputs are applied to the data bus of the first station. Second gating circuitry decodes control signals from the second station and generates a read or write signal. The read pulse signal from the second gating circuitry loads the semaphore and ownership signals into third and fourth flipflops, respectively, whose outputs are applied to the data bus of the second station. If the first and second stations access the semaphore simultaneously, access is granted to the second station since the output of the third flipflop resets the first flipflop to deny access to the first station. Although the organization as described operates in a correct manner, the present inventors have experienced a need for a protocol that will flexibly extend to a larger number of stations which may access a single data facility, in particular, an amount of data in a memory, either as information consumers or as information producers.
SUMMARY TO THE INVENTION
In consequence, amongst other things, it is an object of the present invention to provide an organization and protocol that at a low hardware cost are more flexible and more symmetric, in particular by assigning each respective semaphore to exactly one single station, so that write conflicts between two or more stations with respect to a particular semaphore are categorily ruled out. The invention also relates to a data processing apparatus arranged for practising the synchronizing method.
Prior art has a hardware semaphore that signals the previous mode of the system, which is not straightforwardly extendable to more than two stations, and which is in particular suitable for sharing a hardware resource. The present invention in particular shares data, and for block-organized transfer must ensure that reading is not started before writing has ended. The first station should not be allowed to execute a write-access with new data before all second stations will have read-accessed the old data. Alternatively, the second stations should all have filled in their respective and privileged parts of a collective data item, before the first station should be allowed to read. The fact that all semaphores have a single fixed owner station renders the scheme extendable. The invention may also be used in cases where two or more stations should synchronize their read accesses to a particular block of information that has been provided by a single write station. Note that the size of the block is inconsequential, and may go down to only a single sample such as a digital autio sample. The invention does not need specific and complex hardware for avoiding all conflicts between the various accessing operations.


REFERENCES:
patent: 5263161 (1993-11-01), Barth et al.
patent: 5313638 (1994-05-01), Ogle et al.
patent: 5432911 (1995-07-01), Mura et al.
patent: 5968134 (1999-10-01), Putzolu et al.
patent: 6185287 (2001-02-01), Miloslavasky

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