Method and system for synchronizing all clock sources of...

Details Method and system for synchronizing all clock sources of... Method and system for synchronizing all clock sources of...

2007-04-24

2007-04-24

Cao, Chun (Department: 2115)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

C713S400000, C375S356000

Reexamination Certificate

active

10756879

ABSTRACT:
A method and system for clock synchronization of semiconductor devices. The method uses a master-slave configuration to designate a semiconductor device with the lowest rate clock source as a master device and zero all clock sources inside the semiconductor device in order to output the zeroing lowest rate clock source to slave devices for clock synchronization of all clock sources respectively in the slave devices, and further implements a phase checker in each semiconductor device to ensure clock synchronization inside and between the semiconductor devices, so required clock signals are precisely provided to next internal circuits of the semiconductor devices.

REFERENCES:
patent: 393660 (1888-11-01), Pommerening
patent: 5999025 (1999-12-01), New
patent: 6304582 (2001-10-01), Zhang et al.
patent: 6754745 (2004-06-01), Horvath et al.
patent: 11202970 (1999-07-01), None

Affiliated with

Also associated with

Rating

Method and system for synchronizing all clock sources of... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and system for synchronizing all clock sources of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for synchronizing all clock sources of... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3757845