Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-04-14
1999-07-13
Cabeca, John W.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711141, 711137, G06F 1300
Patent
active
059241187
ABSTRACT:
A method and system for speculatively sourcing data among cache memories within a multiprocessor data-processing system is disclosed. In accordance with the method and system of the present invention, the data-processing system has multiple processing units, each of the processing units including at least one cache memory. In response to a request for data by a first processing unit within the data-processing system, an intervention response is issued from a second processing unit within the data-processing system that contains the requested data. The requested data is then sourced from a secondary cache memory within the second processing unit onto a system data bus concurrently with invalidating a copy of the requested data from a primary cache within the second processing unit. During this time, the second processing unit is also pending for a combined response to return from all the processing units.
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Arimilli Ravi Kumar
Dodson John Steven
Lewis Jerry Don
Cabeca John W.
Dillon Andrew J.
Henkler Richard A.
International Business Machines - Corporation
Lee Felix B.
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