Electrical computers and digital processing systems: virtual mac – Task management or control – Process scheduling
Reexamination Certificate
2006-10-31
2006-10-31
Thomson, William (Department: 2194)
Electrical computers and digital processing systems: virtual mac
Task management or control
Process scheduling
C709S230000, C370S394000
Reexamination Certificate
active
07131125
ABSTRACT:
Route switch packet architecture processes data packets using a multi-threaded pipelined machine wherein no instruction depends on a preceding instruction because each instruction in the pipeline is executed for a different thread. The route switch packet architecture transfers a data packet from a flexible data input buffer to a packet task manager, dispatches the data packet from the packet task manager to a multi-threaded pipelined analysis machine, classifies the data packet in the analysis machine, modifies and forwards the data packet in a packet manipulator. The route switch packet architecture includes an analysis machine having multiple pipelines, wherein one pipeline is dedicated to directly manipulating individual data bits of a bit field, a packet task manager, a packet manipulator, a global access bus including a master request bus and a slave request bus separated from each other and pipelined, an external memory engine, and a hash engine.
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Craren Michael J.
Modelski Richard P.
McGuinness & Manaras LLP
Nortel Networks Limited
Thomson William
Zhen Li
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