Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2005-04-26
2005-04-26
Iqbal, Nadeem (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
Reexamination Certificate
active
06886107
ABSTRACT:
A system and method for configuring a control plane within a network device. One of a pair of control processors is selected to act as the master of the control plane and the other control processor is specified as a standby control processor in normal operation. In the case of a failover or switchover event, the standby control processor assumes the role of the master of the control plane and updates configuration information within line cards in the network device as necessary. A state machine within the control processor is employed to manage state transitions for the control processor. Each control processor generates at least one signal that indicates whether it is capable of serving as the master of the control plane. Master selection logic selects one of the control processors as the master for the control plane and in one embodiment advertises the identification of the master control processor via triply redundant signals. Voting logic within the control processors and other cards within the network device is employed to identify the selected master unit for the control plane. The selected master control plane processor forwards the configuration information over control paths that are isolated from the data path within the network device.
REFERENCES:
patent: 6542924 (2003-04-01), Abe
patent: 6587961 (2003-07-01), Garnett et al.
Barbas Steve N.
Friend James F.
Walsh Robert J.
Bonura Timothy M.
Iqbal Nadeem
Marconi Intellectual Property (Ringfence) , Inc.
Schwartz Ansel M.
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