Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1994-08-15
1999-12-21
Donaghue, Larry D.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711125, 711134, G06F 9445
Patent
active
060060336
ABSTRACT:
A system and method are provided that allows the results of an instruction trace mechanism to globally restructure the instructions. The process reorders the instructions in an executable program, using an actual execution profile (or instruction address trace) for a selected workload, to improve utilization of the existing hardware architecture. The reordering of instructions is implemented at a global level (i.e., independent of procedure or other structural boundaries which maximizes speedup) running on various hardware platforms and adds the ability to preserve correctness and debuggability for reordered executables. An unconditional branch instruction is added at the memory locations where reordered instructions previously were stored. When a dynamic branch occurs, the program will attempt to access the instruction at the original address and the unconditional branch directs the program to the reordered location of the instruction and program integrity is maintained.
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Donaghue Larry D.
Henkler Richard A.
International Business Machines - Corporation
McBurney Mark E.
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