Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
Reexamination Certificate
2000-06-29
2004-03-30
Elamin, Abdelmoniem (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output access regulation
C709S237000, C710S048000, C710S260000, C710S261000
Reexamination Certificate
active
06715005
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates in general to message passing systems and, in particular, to input/output (I/O) management in asynchronous data transfers. Still more particularly, the present invention relates to utilizing a data unit arrival prediction apparatus to implement an I/O data synchronization policy.
2. Description of the Related Art
As the need for interactivity between computers and processor-based systems increases, improved message handling systems are required for passing messages within host-peripheral and server-client systems. The server-client system performance, in terms of overall latency and overhead processing that are often expended to process a message received by a host or server from a peripheral or client, is an important aspect of message handling that is becoming increasingly troublesome as input/output (I/O) traffic within such systems increases.
Many possible contexts are possible in which message receipt processing arises. A personal computer serving as host to peripheral devices that include a keyboard, a printer, a modem, and a disk drive is one example. Another example is a server-client architecture, in which servers provide internetwork and intranetwork connectivity for many different clients within a telecommunications network. For economy of reference, the “server-client” terminology will be utilized to refer to either type of architecture as well as any other architecture in which the foregoing message receipt problem may be encountered such as node-to-node communication within a cluster network.
In the evolution of server-client systems, two approaches were developed for handling the message passing between server and client devices. The first approach is known as “blocking” mode in which the client signals the server regarding its servicing needs. The other approach is known as polling whereby a server processor successively queries a client devices regarding their needs for servicing. Each of the two approaches has advantages and disadvantages with regard to the aforementioned system performance parameters of latency and overhead CPU utilization.
Polling generally has lower message receipt processing latency than blocking due to the relatively high speed at which client devices may be queried. However, if the time lapse between receipt of a message and acknowledgment thereof is much greater than the latency that would have otherwise been induced by blocking, the message-handling latency advantage over blocking is lost in favor of the processor cycles saved during blocking.
The problem with polling has resulted in efforts to “tune” the manner in which polling is performed to provide an optimum balance between system load and data latency. An example of such an approach is explained in U.S. Pat. No. 5,081,577 in which the interpoll delay constant could be selectively adjusted according to the operating characteristics of the particular peripheral device. In this manner, the polling interval may be optimized so that the peripheral is not overpolled (resulting in polling while the peripheral device is busy)or underpolled (resulting in reduced data throughput).
In theory the tuned polling technique offers great relief and avoids the added latency caused by blocking. In reality however, the tuned polling technique is inflexible at best and impracticable at worst due to its reliance on particular device characteristics. Each peripheral device will have particular delay characteristics depending on upon its function and operating context. If the function and/or operating context change, the tuned polling interval will likely be inappropriate.
Although blocking is a favorable alternative to polling during low traffic periods marked by relatively long inter-message timespans, blocking induces substantial latency into message handling. The asynchronous nature of blocking contributes directly to message latency requiring a kernel transition by the server processor to address receipt of an interrupt.
It can therefore be appreciated that a need exists for an improved message handling technique to accommodate current high-volume traffic in a server-client environment.
SUMMARY OF THE INVENTION
A method and system are disclosed for synchronizing message transfers from a sender to a receiver, such that message latency and overhead processing are minimized. A next inter-message arrival delay is initially predicted in accordance with traffic history. The predicted inter-message arrival delay is categorized as either an intra-burst delay or an inter-burst delay. In response to a prediction of an inter-burst delay, the receiver is operated in a blocking mode wherein the receiver waits for an interrupt request from the sender. In response to a prediction of an intra-burst delay, the receiver is switched to a polling mode wherein the receiver polls for a message complete signal from said sender.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.
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Nagar Shailabh
Rodriguez Jorge R.
Bracewell & Patterson LLP
Elamin Abdelmoniem
McKinley Martin J.
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