Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
1999-12-03
2003-12-02
Chin, Stephen (Department: 2734)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S354000
Reexamination Certificate
active
06658073
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to digital information systems. More particularly, the present invention relates to a method and system for rapidly synchronizing two or more digital communications systems.
BACKGROUND ART
The transmission of digital information and data between systems has become an essential part of commonly used systems. With such systems, information content is transmitted and received in digital form as opposed to analog form. Information long associated with analog transmission techniques, for example, television, telephone, music, and other forms of audio and video, are now being transmitted and received in digital form. The digital form of the information allows signal processing techniques not practical with analog signals. In most applications, the user has no perception of the digital nature of the information being received.
Traditional modes of communication often occur in “real time.” This is true for both one-way and bi-directional communication systems. For example, a “live” television sports broadcast occurs in real time (one-way). A telephone conversation occurs in real time (bi-directional). Users have come to expect these and other such traditional forms of communication to be error-free and in real time. Thus, digital transmission and reception techniques and systems need to provide for the real time transmission and reception of information with minimum distortion and/or errors.
There is a problem, however, in that digital communication between devices distant from each other usually precludes the availability of identical sampling frequencies. Except for those cases where a distinct clocking hierarchy structure can be defined and a common distributed clock source employed, there will be some difference between the internal clock frequency, and thus the sample rate, of one device (e.g., the transmitter) and the internal clock frequency of the other device (e.g., the receiver).
Prior Art
FIG. 1
shows a typical prior art asynchronous digital information transmission and reception system
100
. System
100
depicts a first communications device
105
and a second communications device
115
. Communications device
105
includes a data register
102
coupled to receive a data input to
103
. Data register
102
is coupled to receive a clock signal
104
(FSYNC
1
). Data register
102
provides data to communications device
115
via transmission line
120
. Communications device
115
includes a data register
112
coupled to receive the data on line
120
. Data register
112
is coupled to receive an internal clock signal
114
(FSYNC
2
). The data on line
120
emerges from data register
112
as a data output
113
.
As described above, digital communication between devices distant from each other usually precludes the availability of identical sampling frequencies. Consequently, there will be some difference between the internal clock frequencies of the devices. The internal clock frequency of the first device
105
differs from the internal clock frequency of the second device
115
by some small amount. This is depicted in
FIG. 1
as device
105
having its own “timing flow”
101
and device
115
having its own timing flow
111
, due to both devices having their own internal clocks.
To maintain synchronization between the devices on either side of the communications link
120
, synchronization techniques have been developed. In most instances, the synchronization technology is applicable and functions adequately. Consequently, digital communications systems (e.g., digital television, digital telephony, etc.) have proliferated and become widely accepted. The synchronization performance obtainable with conventional, prior art synchronization technology is sufficient to allow most applications (e.g., digital television) to function as intended. However, certain configurations do not allow for such a synchronization. In those configurations, using prior art data transfer methods results in a substantial amount of data loss and distortion.
Referring still to Prior Art
FIG. 1
, as is well known, when transferring data between totally asynchronous devices (e.g., device
105
and device
115
), a certain amount of data loss is unavoidable due to the drifting clocks of the two systems. As soon as the boundaries of the clock signals determining the data transfer speed of each system (e.g., signals
104
and
114
) cross each other, data samples will either be repeated or deleted, depending on which of the two systems involved is faster. For example, as depicted in
FIG. 1
, signal
104
is synchronous to the timing of device
105
(e.g., timing flow
101
) and determines the corresponding data rate of device
105
. With device
115
, signal
114
is synchronous to timing flow
111
and determines its corresponding respective data rate. These data rates are not exactly the same, and hence, the resulting timing relationship drifts.
For example, to illustrate the drifting system clock effect, in a case where signal
104
(FSYNC
1
) has a frequency of 8 kHz and signal
114
(FSYNC
2
) has a frequency of 8 kHz-100 ppm, every 10,000th data sample transmitted across communications link
120
will be lost, e.g., one sample in 1.25 s.
In reality, however, a much larger amount of data is lost. This is due to the fact that the timing references of devices
105
and
115
are often jittering because the devices themselves are synchronized to another timing source. In such a case, the repetitive impairment will not only concern a single data sample but rather be a burst of data errors. This happens as soon as the (average) distance between the two timing signals (e.g., signals
104
and
114
) is less than peak jitter amplitude. In this case the exact sequence of the timing signals depends only on the jitter characteristics and is in general entirely arbitrary. For any data transfer under these conditions, timing signal
104
can occur earlier or later as timing signal
114
resulting in the sampling the correct data or in the loss/repetition of a sample. This relationship is graphically depicted in prior Art FIG.
2
.
Referring now to Prior Art
FIG. 2
, a timing diagram
200
showing the relationship between signal
104
(FSYNC
1
)of device
105
and signal
114
(FSYNC
2
)of device
115
is shown. As depicted in diagram
200
, the vertical lines of the horizontal trace of signal
104
and the vertical lines of the horizontal trace of signal
114
show the phase relationship between the two (e.g., rising edge). With respect to signal
104
as a reference, the phase of signal
114
jitters by some amount above and below normal, with some peak amount of jitter. This is shown as the possible positions of FSYNC
2
due to jitter
202
, in conjunction with a peak jitter
202
(e.g., the shaded region around the rising edges of signal
114
). As described above, the small frequency difference between signals
104
and
114
causes a drift between the two. This is depicted in diagram
200
as drift direction
203
.
Hence, for example, given a FSYNC
1
=8 kHz, FSYNC
2
=8 kHz-100 ppm, and a peak timing jitter of FSYNC
2
of 2 us, the operation of system
100
shown in
FIG. 1
will result in a repetitive sequence of a non-errored periods data transmission of line
120
of 1.21 sec in length, and (worst case) an error burst of 40 ms, or 320 data samples length. This amount of data loss is quite significant.
Thus, what is required is a system for digital transmission which overcomes the data loss associated with the asynchronous transmission limitations of the prior art. The required system should provide for data transmission and reception which minimize the amount of data loss in the communications between asynchronous digital systems. The required system should be capable of establishing a stable communications link free of error bursts caused by jitter. The present invention provides a novel solution to these requirements.
DISCLOSURE OF THE INVENTION
The present invention provides a method and system for digital transmission
Ahn Sam K.
Chin Stephen
Koninklijke Philips Electronics , N.V.
Zawilski Peter
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