Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2006-01-10
2006-01-10
Padmanabhan, Mano (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
Reexamination Certificate
active
06986012
ABSTRACT:
The invention relates to a method of writing data to and reading data from a memory (102) by a host. By limiting processing time, time restrictions regarding the data to be processed can be met. However, this is at the expense of data integrity. By setting time limits for a group (300) of multiple processing assignments and dynamic allocation of time, reserved for error recovery and retries, data integrity can be improved, while time limits can still be met. Furthermore, by attaching priorities to the assignments, multiple types of data can be handled in one group of assignments. For example, assignments with real-time requirements can be put in a group with assignments with best effort requirements. In this way, more flexible planning of processing assignments is possible. The invention also relates to a system for writing data to and reading data from a memory.
REFERENCES:
patent: 0795813 (1997-09-01), None
patent: 0880136 (1998-11-01), None
patent: 0075923 (2000-12-01), None
Microsoft Computer Dictionary, 1999, Microsoft Press, Fourth Edition, p. 357.
Jochemsen Robert
Lambert Nicolaas
Li Hong
Mesut Ozcan
Wijnands Rudi Jozef Marie
Koninklijke Philips Electronics , N.V.
Padmanabhan Mano
Rojas Midys
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