Method and system for rate adaptation

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output process timing

Reexamination Certificate

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Details

C710S060000, C710S061000, C710S052000, C710S029000, C713S400000, C713S600000

Reexamination Certificate

active

07747795

ABSTRACT:
A media access controller to adapt a rate of an output signal to a rate of an output medium is provided. The media access controller includes a register configured to output data to an external device, said register comprising a first input configured to control an output of the register and a second input configured to control an input to said register. The media access controller also includes a receiver configured to accept a signal from an external clock over the output medium and to provide said external clock signal to said first input of said register. An internal clock in the media access controller is configured to provide an internal clock signal from said internal clock to said second input of said register.

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patent: 6990598 (2006-01-01), Sherburne, Jr.
patent: 2002/0114354 (2002-08-01), Sinha et al.
patent: 2004/0158657 (2004-08-01), Momtaz et al.
patent: 0752796 (1997-01-01), None
patent: 0907300 (1999-04-01), None

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