Method and system for rapidly identifying silicon...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000

Reexamination Certificate

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07401317

ABSTRACT:
The present invention is directed to a method and system for rapidly identifying physical locations of manufacturing defects on the surface of a semiconductor die. The method and system first retrieve information about an electrical failure from an IC's electrical test result and then identify a set of electrical elements from the IC's layout design including a start resource and an end resource. Next, the method and system identify a physical signal path between the start resource and the end resource using the IC's layout design. Finally, the method and system examine a corresponding region on the semiconductor die that covers the physical signal path for manufacturing defects that may be responsible for the electrical failure.

REFERENCES:
patent: 7120890 (2006-10-01), Urata et al.

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