Method and system for quantizing an analog signal utilizing...

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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C327S195000, C327S196000, C377S078000

Reexamination Certificate

active

06348887

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
This invention relates generally to electronic quantizing and more particularly to a method and system for quantizing an analog signal utilizing a clocked resonant tunneling diode pair.
BACKGROUND OF THE INVENTION
Analog-to-digital converters have been formed in a variety of architectures. Conventionally, these architectures have been implemented with transistors. For example, one common implementation includes a cross-coupled pair of transistors. However, there are several disadvantages associated with using transistors to implement an analog-to-digital converter.
First, electronic components used in digital circuits are becoming smaller. As these devices decrease in size, quantum mechanical effects begin to appear. The electrical properties of conventional transistors may be unacceptably altered by quantum mechanical effects. Secondly, a transistor-implemented analog-to-digital converter is limited by the switching speed of the transistors, which may be too slow for some applications. Finally, conventional transistors are limited to two stable states. Thus, systems using transistors typically only convert analog signals into binary digital signals, making the use of multi-valued logic difficult.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method and system for quantizing an analog signal utilizing a clocked resonant tunneling diode pair is provided that substantially eliminates or reduces the disadvantages or problems associated with previously quantizers.
In one embodiment of the present invention, a system for quantizing an analog signal is provided that comprises an input terminal receiving an analog input signal, a clock terminal receiving a clock signal, and an inverted clock terminal receiving an inverted clock signal. A first negative-resistance element has a first terminal coupled to the clock terminal and a second terminal coupled to the input terminal. A second negative-resistance element has a first terminal coupled to the input terminal and a second terminal coupled to the inverted clock terminal. A quantized output signal is generated at an output terminal coupled to the second terminal of the first negative-resistance element and the first terminal of the second negative-resistance element.
Technical advantages of the present invention include providing an improved method and system for quantizing an analog signal. In particular, a negative-resistance element such as a resonant tunneling diode is included as a part of the analog-to-digital converter. Accordingly, reliance on transistors is avoided. As a result, the detrimental effects of quantum mechanics are minimized or not present, switching speed is increased, and use of multi-valued logic is possible.
Other technical advantages of the present invention will be readily apparent to one skilled in the art from the following figures, descriptions, and claims.


REFERENCES:
patent: 3569733 (1971-03-01), Weischedel
patent: 3701148 (1972-10-01), Frei
patent: 3815124 (1974-06-01), Brewer
patent: 3889134 (1975-06-01), Basham
patent: 5132557 (1992-07-01), Uchida et al.
patent: 5272480 (1993-12-01), Lee
patent: 5444751 (1995-08-01), Sage
patent: 5563530 (1996-10-01), Frazier et al.
patent: 5698997 (1997-12-01), Williamson, III et al.
patent: 5815008 (1998-09-01), Williamson, III et al.
patent: 5874911 (1999-02-01), Kodama
patent: 5930323 (1999-07-01), Tang et al.
patent: 6037819 (2000-03-01), Broekaert
patent: 27 55 228 (1979-06-01), None
patent: SU 1370758 (1988-01-01), None
PCT Written Opinion dated May 29, 2001 for PCT/US00/00173 filed Jan. 5, 2000.
Sun C.K., et al: “A Bridge Type Optoelectronic Sample and Hold Circuit”, Proceedings of the International Symposium on Circuits and Systems, US, New York, IEEE, vol. SYMP. 24, 1991, pp. 3003-3006, Jun. 1991.
PCT International Search Report dated Apr. 25, 2000 for PCT/US 00/00174 dated Jan. 5, 2000, Apr. 25, 2000.
Fushimi, K., “Pulse Circuits Using Esaki Diodes”, Electronics and Communications in Japan., vol. 47, No. 4, Apr. 1964, pp. 142-152, XP-000907071, Scripta Technica, NY, US, Apr. 1964.
H. B. Baskin, “N-Valued Logic Circuit”, IBM Technical Disclosure Bulletin, vol. 3, No. 10, Mar. 1, 1961.
PCT International Search Report dated Jun. 29, 2000 for PCT/US00/00173 filed Jan. 5, 2000.
PCT International Search Report dated Jun. 13, 2000 for PCT/US00/00171 filed Jan. 5, 2000.
Mir, S., et al, “Unified Built-In Self-Test for Fully Differential Analog Circuits”, Journal of Electronic Testing: Theory and Applications 9, 135-151 (1996), 1996 Kluwer Academic Publishers.
Sen-Jung Wei, et al, “A Self-Latching A/D Converter Using Resonant Tunneling Diodes”, IEEE Journal of Solid-State Circuits, vol. 28, No. 6, Jun. 1993, pp. 697-700.
Takumi Miyashita, et al., “5 GHz &Sgr;&Dgr; Analog-to-Digital Converter with Polarity Alternating Feedback Comparator”, IEEE Gallium Arsenide Integrated Circuit Symposium, pp. 91-94, 1997.
Kleks, J., “A 4-Bit Single Chip Analog to Digital Converter with A 1.0 Gigahertz Analog Input Bandwidth”, IEEE Gallium Arsenide Integrated Circuit Symposium, pp. 79-82, 1987.

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