Method and system for providing tapered shallow trench isolation

Details Method and system for providing tapered shallow trench isolation Method and system for providing tapered shallow trench isolation

1997-12-18

1999-12-07

Utech, Benjamin

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

438700, 438719, 438690, 438710, 438691, 438692, H01L 21308

Patent

active

059983019

ABSTRACT:
A method and system for providing a shallow trench isolation structure profile on a semiconductor is disclosed. The method and system includes patterning a mask on the semiconductor substrate, etching the mask such that the mask has sloped sides, etching the semiconductor substrate to form a trench whereby the trench has tapered sides, and planarizing the semiconductor substrate to optimize the trench depth and the width of the trench opening for subsequent processes. According to the method and system disclosed herein, the present invention allows a shallow trench isolation structure profile to be formed which has tapered sides.

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Stanley Wolf and Richard Tauber "Silicon Processing for the VLSI era" vol 1, pp 357-358, 1986.

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