Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Reexamination Certificate
2000-04-25
2003-02-04
Lund, Jeffrie R. (Department: 1763)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
C438S790000, C430S317000, C257S347000
Reexamination Certificate
active
06515342
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to semiconductor processing and more particularly to a method and system for transferring a photoresist pattern having reduced footing to low dielectric constant materials.
BACKGROUND OF THE INVENTION
Semiconductor technology has been increasing driven to lower device size. The feature size in the current conventional semiconductor devices is on the order of 0.18 microns or less. As the size of features decreases, the thicknesses of and separation between metal lines also decreases. However, the metal lines must still be insulated from each other. As the separation between metal lines has decreased, conventional high dielectric constant materials have become less desirable for use in isolating metal lines. Instead, low dielectric constant materials, such as hydrogen silsequioxane (“HSQ”), are increasingly of interest for electrically isolating structures in sub-0.25 micron technology. Generally, a material is considered a low dielectric constant material when it has a dielectric constant on the order of 2.5 or below.
In order to use low dielectric constant materials to separate metal lines, the low dielectric constant materials must be patterned and etched. The low dielectric constant material is first deposited on the semiconductor. In a conventional method for semiconductor processing, a primer would then be applied and photoresist would be spun on to the low dielectric constant material. The photoresist would then be patterned. Finally, the low dielectric constant material would be etched to form structures, such as trenches.
The adhesion of the photoresist to the low dielectric constant material is not uniform. Instead, areas which do not adhere to the low dielectric constant material are formed. When the photoresist is patterned, pieces of the photoresist which do not adhere to the low dielectric constant material may break off. Moreover, when the low dielectric constant material is etched, the areas etched may be the wrong size. For example, although trenches may be formed in the low dielectric constant material, conventional methods may not be able to form trenches of the appropriate size, form, or separation.
In addition, the use conventional semiconductor processing methods when processing low dielectric constant materials may result in resist footing. Footing occurs when the photoresist that remains after development does not have substantially vertical walls. Instead, a foot is formed at the bottom of the wall of the feature. Thus, when the low dielectric constant material is etched, the appropriate structure is not transferred from the photoresist to the low dielectric constant material because of the foot at the base of the remaining photoresist.
Accordingly, what is needed is a system and method for providing a photoresist pattern having reduced footing and more accurately transferring the photoresist pattern to low dielectric constant materials. The present invention addresses such a need.
SUMMARY OF THE INVENTION
The present invention provides a method and system for forming a plurality of structures in a low dielectric constant layer. The low dielectric constant layer is disposed on a semiconductor. The method and system comprise exposing the low dielectric constant layer to an agent that improves adhesion of a photoresist, providing a layer of the photoresist on the low dielectric constant layer, patterning the photoresist, and etching the low dielectric constant layer to form the plurality of structures.
According to the system and method disclosed herein, the present invention provides a photoresist pattern having reduced footing and allows low dielectric constant materials to be more accurately patterned.
REFERENCES:
patent: 5208066 (1993-05-01), Fujisaki et al.
patent: 5250669 (1993-10-01), Ogawa et al.
patent: 5607818 (1997-03-01), Akram et al.
patent: 5686337 (1997-11-01), Koh et al.
patent: 5880018 (1999-03-01), Boeck et al.
Gupta Subhash
Morales Carmen
Singh Bhanwar
Advanced Micro Devices , Inc.
Lund Jeffrie R.
Sawyer Law Group LLP
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