Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2007-02-27
2007-02-27
Phung, Anh (Department: 2824)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S230030
Reexamination Certificate
active
10982691
ABSTRACT:
A memory system is provided. The memory system includes a volatile memory having a number of banks, each bank having a number of rows, and a memory controller configured to direct the volatile memory to engage in an auto-refresh mode, the memory controller further configured to provide a target bank address to the volatile memory. The volatile memory is configured to perform an auto-refresh operation in the auto-refresh mode, the auto-refresh operation being performed on a target bank identified by the target bank address. Remaining banks in the plurality of banks other than the target bank are available for memory access while the auto-refresh operation is being performed on the target bank.
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Remaklus, Jr. Perry Willmann
Walker Robert Michael
Pauley Nicholas J.
Phung Anh
Qualcomm Incorporated
Rouse Thomas
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