Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Virtual machine memory addressing
Reexamination Certificate
2006-08-07
2011-10-18
Ellis, Kevin (Department: 2189)
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
Virtual machine memory addressing
C711S163000, C711S207000, C711SE12091
Reexamination Certificate
active
08041876
ABSTRACT:
A method for providing hardware support for memory protection and virtual memory address translation for a virtual machine. The method includes executing a host machine application within a host machine context and executing a virtual machine application within a virtual machine context. A plurality of TLB (translation look aside buffer) entries for the virtual machine context and the host machine context are stored within a TLB. Memory protection bits for the plurality of TLB entries are logically combined to enforce memory protection on the virtual machine application.
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Non-Final Office Action Dated Aug. 11, 2005; U.S. Appl. No. 10/607,934.
Notice of Allowance Dated Apr. 21, 2006; U.S. Appl. No. 10/607,934.
Ellis Kevin
Mackall Larry
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