Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2006-07-18
2006-07-18
Zarabian, Amir (Department: 2827)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S230030
Reexamination Certificate
active
07079440
ABSTRACT:
A memory system is provided. The memory system includes a volatile memory having a number of banks and a memory controller configured to control the volatile memory to engage in an auto-refresh mode or a self-refresh mode. The memory controller is further configured to direct the volatile memory to perform an auto-refresh operation on a target bank. The remaining banks are available for access while the auto-refresh operation is being performed on the target bank.
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patent: 2005/0265103 (2005-12-01), Remaklus et al.
patent: 2005/0265104 (2005-12-01), Remaklus et al.
patent: 9702652 (1997-02-01), None
Remaklus, Jr. Perry Willmann
Walker Robert Michael
Brown Charles D.
Pauley Nicholas J.
QUALCOMM Incorporated
Wadsworth Phillip R.
Weinberg Michael J.
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